- 专利标题: Analog computer architecture for fast function optimization
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申请号: US17171824申请日: 2021-02-09
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公开(公告)号: US11967951B2公开(公告)日: 2024-04-23
- 发明人: Ion Matei , Aleksandar Feldman , Johan de Kleer
- 申请人: Xerox Corporation
- 申请人地址: US CT Norwalk
- 专利权人: Xerox Corporation
- 当前专利权人: Xerox Corporation
- 当前专利权人地址: US CT Norwalk
- 代理机构: Womble Bond Dickinson (US) LLP
- 主分类号: H03K19/17748
- IPC分类号: H03K19/17748 ; G06G7/122 ; G06G7/32
摘要:
An analog circuit for solving optimization algorithms comprises three voltage controlled current sources and three capacitors, operatively coupled in parallel to the three voltage controlled current sources, respectively. The circuit further comprises a first inductor, operatively coupled in series between a first pair of the capacitors and the voltage controller current sources and a second pair of the capacitors and the voltage controller current sources. The circuit further comprises a second inductor, operatively coupled in series between the second pair of the capacitors and the voltage controller current sources and a third pair of the capacitors and the voltage controller current sources.
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