Invention Grant
- Patent Title: Generating patterns for memory threshold voltage difference
-
Application No.: US17680042Application Date: 2022-02-24
-
Publication No.: US11978513B2Publication Date: 2024-05-07
- Inventor: Zhongyuan Lu , Robert J. Gleixner
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C7/04 ; G11C16/26 ; G11C16/34

Abstract:
Apparatuses, methods, and systems for generating patterns for memory using threshold voltage difference are disclosed. An embodiment includes circuitry and a memory array including a plurality of memory cells. The circuitry can select a group of memory cells from the plurality of memory cells, program each memory cell of the group to a first data state, determine a first threshold voltage of each memory cell of the group, program each memory cell of the group to a second data state, perform a number of snapback events on each memory cell of the group, program each memory cell of the group to the first data state, determine a second threshold voltage of each memory cell of the group having the first data state, and generate a pattern for the memory array based, at least in part, on a difference between the first threshold voltage and the second threshold voltage.
Public/Granted literature
- US20230268006A1 GENERATING PATTERNS FOR MEMORY THRESHOLD VOLTAGE DIFFERENCE Public/Granted day:2023-08-24
Information query