Invention Grant
- Patent Title: Contact and isolation in monolithically stacked VTFET
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Application No.: US17545074Application Date: 2021-12-08
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Publication No.: US11978796B2Publication Date: 2024-05-07
- Inventor: Chen Zhang , Ruilong Xie , Lan Yu , Kangguo Cheng
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Edward J. Wixted, III
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/088 ; H01L29/417 ; H01L29/66

Abstract:
Monolithically stacked VTFET devices having source/drain contacts with increased contact area and dielectric isolation are provided. In one aspect, a stacked VTFET device includes: at least a bottom VTFET below a top VTFET, wherein the bottom VTFET and the top VTFET each includes source/drain regions interconnected by a vertical fin channel, and a gate stack alongside the vertical fin channel; and source/drain contacts to the source/drain regions, wherein at least one of the source/drain contacts is in direct contact with more than one surface of a given one of the source/drain regions. A stacked VTFET device having at least a bottom VTFET1 below a top VTFET1, and a bottom VTFET2 below a top VTFET2, and a method of forming a stacked VTFET device are also provided.
Public/Granted literature
- US20230178651A1 Contact and Isolation in Monolithically Stacked VTFET Public/Granted day:2023-06-08
Information query
IPC分类: