Invention Grant
- Patent Title: Memory device including row hammer preventing circuitry and an operating method of the memory device
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Application No.: US17939327Application Date: 2022-09-07
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Publication No.: US12014764B2Publication Date: 2024-06-18
- Inventor: Jungmin You
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR 20210121181 2021.09.10
- Main IPC: G11C11/406
- IPC: G11C11/406 ; G11C11/4078

Abstract:
A row hammer preventing circuitry including: a first table storing a count value representing a hit count and an address bit of multiple entries, each entry corresponding to access-requested target rows; a second table including safe bits and a safe bit counter; and a row hammer preventing logic to identify masking entries, on which a masking comparison is to be performed, among the entries on the basis of the safe bit counter, to determine a hit or miss on the basis of whether other bits except an MSB among address bits of an access-requested target row match other bits except an MSB among address bits of the masking entries, and to generate a control signal indicating an additional refresh on rows adjacent to rows corresponding to a masking entry whose hit count is greater than a threshold value.
Public/Granted literature
- US20230079457A1 MEMORY DEVICE INCLUDING ROW HAMMER PREVENTING CIRCUITRY AND AN OPERATING METHOD OF THE MEMORY DEVICE Public/Granted day:2023-03-16
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