Invention Grant
- Patent Title: Synchronizing systems-on-chip using GPIO timestamps
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Application No.: US17496261Application Date: 2021-10-07
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Publication No.: US12021611B2Publication Date: 2024-06-25
- Inventor: Samuel Ahn , Dmitry Ryuma , Richard Zhuang
- Applicant: Samuel Ahn , Dmitry Ryuma , Richard Zhuang
- Applicant Address: US CA Marina Del Rey
- Assignee: Snap Inc.
- Current Assignee: Snap Inc.
- Current Assignee Address: US CA Santa Monica
- Agency: Culhane Meadows PLLC
- Agent Stephen J. Weed
- Main IPC: H04W56/00
- IPC: H04W56/00 ; G02B27/01 ; G06F1/10 ; G06F1/12 ; G06F13/24 ; G06F13/40 ; H04J3/06

Abstract:
An electronic eyewear device includes first and second systems-on-chip (SoCs) having independent time bases. The first and second SoCs are connected by a shared general purpose input/output (GPIO) connection and an inter-SoC interface. The first and second SoCs are synchronized to each other by the first SoC asserting the shared GPIO connection to the second SoC where assertion of the message to the shared GPIO connection triggers an interrupt request (IRQ) at the second SoC. The first SoC records a first timestamp for assertion of the message to the GPIO connection, and the second SoC records a second timestamp of receipt of the IRQ. The first SoC sends a message including the first timestamp to the second SoC over the inter-SoC interface. The second SoC calculates a clock offset between the first and second SoCs as a difference between the first and second timestamps.
Public/Granted literature
- US11990989B2 Synchronizing systems-on-chip using GPIO timestamps Public/Granted day:2024-05-21
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