- 专利标题: Special-purpose digital-compute hardware for efficient element-wise aggregation, scaling and offset
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申请号: US17931537申请日: 2022-09-12
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公开(公告)号: US12045612B2公开(公告)日: 2024-07-23
- 发明人: Geoffrey Burr , Shubham Jain , Milos Stanisavljevic , Yasuteru Kohda
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Intelletek Law Group, PLLC
- 代理商 Gabriel Daniel, Esq.
- 主分类号: G06F9/30
- IPC分类号: G06F9/30 ; G06F9/355 ; G06N20/00
摘要:
An efficient pipelined implementation of digital scaling, offset and aggregation operation supports element-by-element programmable scale and offset factors. The method includes time-multiplexed parallel pipelining of a plurality of digital data words, each of the plurality of digital data words encoding an N-bit signed integer, from one of a plurality of receive-registers through a datapath that can either (1) store the plurality of digital data words directly in a dedicated first memory, (2) store the plurality of digital data words directly in a dedicated second memory, or (3) direct the plurality of digital data words into a parallel set of fused-multiply-add units. The method further includes multiplying each digital data word by a corresponding data-word retrieved from the dedicated first memory to form product data words and adding the product data words to a corresponding data-word retrieved from the dedicated second memory to form an output sum-and-product data words.
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