Switching power amplifier with output harmonic suppression
Abstract:
A switching power amplifier with harmonic suppression including a polyphase converter and a power amplifier stage. The polyphase converter converts a frequency or phase modulated input signal into a 50% duty cycle rail-to-rail signal, a positive 25% duty cycle rail-to-rail signal that is centered with the 50% duty cycle signal when high, and a negative 25% duty cycle rail-to-rail signal that is centered with the 50% duty cycle signal when low. The power amplifier stage includes first and second branches coupled between upper and lower nodes, each including series-coupled P-channel and N-channel transistors forming an intermediate output node. The transistors of the first branch are controlled by the 50% duty cycle signal, and the transistors of the second branch are controlled by the positive and negative 25% duty cycle signals. The first and second branches generate output currents that are superimposed with each other to suppress third and fifth harmonics.
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