Invention Grant
- Patent Title: Isolation structures of semiconductor devices
-
Application No.: US17666241Application Date: 2022-02-07
-
Publication No.: US12051738B2Publication Date: 2024-07-30
- Inventor: Jia-Chuan You , Chih-Hao Wang , Shi Ning Ju , Kuo-Cheng Chiang , Li-Yang Chuang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/088 ; H01L29/06 ; H01L29/165

Abstract:
The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and an isolation structure between the first and second vertical structures. The isolation structure can include a center region and footing regions formed on opposite sides of the center region. Each of the footing regions can be tapered towards the center region from a first end of the each footing region to a second end of the each footing region.
Public/Granted literature
- US20220165868A1 Isolation Structures of Semiconductor Devices Public/Granted day:2022-05-26
Information query
IPC分类: