- 专利标题: Parity data in dynamic random access memory (DRAM)
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申请号: US18108876申请日: 2023-02-13
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公开(公告)号: US12061518B2公开(公告)日: 2024-08-13
- 发明人: Sai Krishna Mylavarapu , Todd A. Marquart
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Brooks, Cameron & Huebsch, PLLC
- 主分类号: G06F11/10
- IPC分类号: G06F11/10 ; G11C11/00 ; G11C11/4074 ; G11C11/4096
摘要:
Methods, devices, and systems related to storing parity data in dynamic random access memory (DRAM) are described. In an example, a method can include generating, at a controller, parity data based on user data queued for writing to a non-volatile memory device, receiving the parity data at a DRAM device from the controller and writing the parity data to the DRAM device, receiving the user data at a non-volatile memory device from the controller and writing the user data to the non-volatile memory device, reading the user data from the non-volatile memory device via the controller, and receiving the parity data at the controller from the DRAM device.
公开/授权文献
- US20230185660A1 PARITY DATA IN DYNAMIC RANDOM ACCESS MEMORY (DRAM) 公开/授权日:2023-06-15
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