Invention Grant
- Patent Title: Read only memory
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Application No.: US18484906Application Date: 2023-10-11
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Publication No.: US12063775B2Publication Date: 2024-08-13
- Inventor: Abderrezak Marzaki , Mathieu Lisart , Benoit Froment
- Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics (Crolles 2) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS,STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS,STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Rousset; FR Crolles
- Agency: Slater Matsil, LLP
- Priority: FR 13741 2020.12.18
- Main IPC: H10B20/00
- IPC: H10B20/00 ; H01L23/00 ; G11C16/04

Abstract:
The present description concerns a ROM including at least one first rewritable memory cell. In an embodiment, a method of manufacturing a read-only memory (ROM) comprising a plurality of memory cells is proposed. Each of the plurality of memory cells includes a rewritable first transistor and a rewritable second transistor. An insulated gate of the rewritable first transistor is connected to an insulated gate of the rewritable second transistor. The method includes successively depositing, on a semiconductor structure, a first insulating layer and a first gate layer, wherein the first insulating layer is arranged between the semiconductor structure and the first gate layer, wherein the rewritable second transistor further includes a well-formed between an associated first insulating layer and the semiconductor structure, and wherein the rewritable first insulating layer is in direct contact with the semiconductor structure; and successively depositing a second insulating layer and a second gate layer.
Public/Granted literature
- US20240040781A1 READ ONLY MEMORY Public/Granted day:2024-02-01
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