- Patent Title: Barrier synchronization between host and accelerator over network
-
Application No.: US17338898Application Date: 2021-06-04
-
Publication No.: US12073262B2Publication Date: 2024-08-27
- Inventor: Ola Torudbakken , Wei-Lin Guay
- Applicant: Graphcore Limited
- Applicant Address: GB Bristol
- Assignee: GRAPHCORE LIMITED
- Current Assignee: GRAPHCORE LIMITED
- Current Assignee Address: GB Bristol
- Agency: HAYNES AND BOONE, LLP
- Priority: GB 10810 2020.07.14
- Main IPC: G06F9/52
- IPC: G06F9/52 ; G06F9/38 ; G06F9/54 ; G06F15/173

Abstract:
A host system compiles a set of local programs which are provided over a network to a plurality of subsystems. By defining the synchronisation activity on the host, and then providing that information to the subsystems, the host can service a large number of subsystems. The defined synchronisation activity includes defining the synchronisation groups between which synchronisation barriers occur and the points during program execution at which data exchange with the host occurs. Defining synchronisation activity between the subsystems allows a large number of subsystems to be connecting whilst minimising the required exchanges with the host.
Public/Granted literature
- US20220019487A1 Communication Between Host and Accelerator Over Network Public/Granted day:2022-01-20
Information query