A memory expander includes a memory device having a first memory region corresponding to a first host and a second memory region corresponding to a second host. A controller communicates with the first host and the second host through a compute express link (CXL) interface. The controller receives a first CXL communication packet from the first host and performs a target data transfer operation of transferring target data stored in the first memory region to the second memory region, in response to the first CXL communication packet.