- Patent Title: Visibility generation improvements in tile based GPU architectures
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Application No.: US17935031Application Date: 2022-09-23
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Publication No.: US12079897B2Publication Date: 2024-09-03
- Inventor: Kalyan Kumar Bhiravabhatla , Andrew Evan Gruber , Rahul Sunil Kukreja , Vishwanath Shashikant Nikam , Tao Wang , Jian Liang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Procopio, Cory, Hargreaves & Savitch
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06T1/60 ; G06T15/00 ; G06T15/40

Abstract:
This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for improving visibility generation in tile-based GPU architectures. A graphics processor may perform a first binning pass associated with visibility information for each of a plurality of primitives in at least one frame. The visibility information for each of the plurality of primitives may correspond to a visible indication or an invisible indication. The graphics processor may update a depth buffer based on the visibility information for all of the plurality of primitives in the at least one frame. The graphics processor may perform a second binning pass for each of the visible set of primitives based on the updated depth buffer. The graphics processor may store at least one of the updated visibility information or updated position data for all primitives in the visible set of primitives from the second binning pass.
Public/Granted literature
- US20240104684A1 VISIBILITY GENERATION IN TILE BASED GPU ARCHITECTURES Public/Granted day:2024-03-28
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