Invention Grant
- Patent Title: Memory cells with asymmetrical electrode interfaces
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Application No.: US17480694Application Date: 2021-09-21
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Publication No.: US12082513B2Publication Date: 2024-09-03
- Inventor: Agostino Pirovano , Kolya Yastrebenetsky , Anna Maria Conti , Fabio Pellizzer
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- The original application number of the division: US16856631 2020.04.23
- Main IPC: H10N70/00
- IPC: H10N70/00 ; G11C13/00 ; H10B63/00 ; H10N70/20

Abstract:
Methods, systems, and devices for memory cells with asymmetrical electrode interfaces are described. A memory cell with asymmetrical electrode interfaces may mitigate shorts in adjacent word lines, which may be leveraged for accurately reading a stored value of the memory cell. The memory device may include a self-selecting memory component with a top surface area in contact with a top electrode and a bottom surface area in contact with a bottom electrode, where the top surface area in contact with the top electrode is a different size than the bottom surface area in contact with the bottom electrode.
Public/Granted literature
- US20220059763A1 MEMORY CELLS WITH ASYMMETRICAL ELECTRODE INTERFACES Public/Granted day:2022-02-24
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