Invention Grant
- Patent Title: Non-volatile memory with optimized erase verify sequence
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Application No.: US17873617Application Date: 2022-07-26
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Publication No.: US12087373B2Publication Date: 2024-09-10
- Inventor: Yi Song , Lito De La Rama , Xiaochen Zhu
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Austin
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C16/00
- IPC: G11C16/00 ; G11C16/04 ; G11C16/16 ; G11C16/34

Abstract:
An erase process for a group of non-volatile memory cells comprises applying doses of erasing to the group and performing erase verify between pairs of successive doses of erasing. The time needed to complete the erase process can be reduced by optimizing the order of performing erase verify. For example, erase verify can be performed by separately performing erase verify for multiple portions of the group in order from previously determined slowest erasing portion of the group to previously determined fastest erasing portion of the group, and aborting the performing of erase verify prior to completion of erase verify for all of the portions of the group in response to a number erase errors exceeding a limit.
Public/Granted literature
- US20240047000A1 NON-VOLATILE MEMORY WITH OPTIMIZED ERASE VERIFY SEQUENCE Public/Granted day:2024-02-08
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