- 专利标题: Low temperature bonded structures
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申请号: US17559485申请日: 2021-12-22
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公开(公告)号: US12100676B2公开(公告)日: 2024-09-24
- 发明人: Cyprian Emeka Uzoh , Jeremy Alfred Theil , Rajesh Katkar , Guilian Gao , Laura Wills Mirkarimi
- 申请人: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- 申请人地址: US CA San Jose
- 专利权人: Adeia Semiconductor Bonding Technologies Inc.
- 当前专利权人: Adeia Semiconductor Bonding Technologies Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: KNOBBE, MARTENS, OLSON & BEAR, LLP
- 主分类号: H01L23/00
- IPC分类号: H01L23/00
摘要:
Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.
公开/授权文献
- US20220165692A1 LOW TEMPERATURE BONDED STRUCTURES 公开/授权日:2022-05-26
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