发明授权
- 专利标题: Buried bit line structure, manufacturing method thereof, and semiconductor structure
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申请号: US17650702申请日: 2022-02-11
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公开(公告)号: US12114484B2公开(公告)日: 2024-10-08
- 发明人: Wei Feng , Jingwen Lu , Bingyu Zhu , Zhaopei Cui
- 申请人: CHANGXIN MEMORY TECHNOLOGIES, INC.
- 申请人地址: CN Hefei
- 专利权人: CHANGXIN MEMORY TECHNOLOGIES, INC.
- 当前专利权人: CHANGXIN MEMORY TECHNOLOGIES, INC.
- 当前专利权人地址: CN Hefei
- 代理机构: Syncoda LLC
- 代理商 Feng Ma
- 优先权: CN 2110862614.0 2021.07.29
- 主分类号: H01L27/108
- IPC分类号: H01L27/108 ; H10B12/00
摘要:
The present disclosure provides a method of manufacturing a buried bit line structure and a buried bit line structure. The method of manufacturing a buried bit line structure includes: providing an initial structure, the initial structure including active region structures; forming an initial bit line trench, the initial bit line trench exposing the active region structure; forming a conductive structure, the conductive structure being located at the bottom of the initial bit line trench; forming a bit line contact structure, the bit line contact structure covering the conductive structure, and a top surface of the bit line contact structure being lower than a top surface of the active region structure; and forming an insulation structure, the insulation structure covering the bit line contact structure.
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