Invention Grant
- Patent Title: Encoder, decoder, encoding method, and decoding method
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Application No.: US17503524Application Date: 2021-10-18
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Publication No.: US12132904B2Publication Date: 2024-10-29
- Inventor: Yusuke Kato , Takahiro Nishi , Tadamasa Toma , Kiyofumi Abe
- Applicant: Panasonic Intellectual Property Corporation of America
- Applicant Address: US CA Torrance
- Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
- Current Assignee Address: US CA Torrance
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Main IPC: H04N7/12
- IPC: H04N7/12 ; H04N19/12 ; H04N19/13 ; H04N19/167 ; H04N19/176 ; H04N19/70

Abstract:
An encoder includes circuitry and memory coupled to the circuitry. In residual coding of a current block, the circuitry, in operation, encodes a subblock flag by Context-based Adaptive Binary Arithmetic Coding (CABAC) in both of a first type of residual coding where an orthogonal transform is performed and a second type of residual coding where the orthogonal transform is skipped, the subblock flag indicating whether a non-zero coefficient is included in a plurality of coefficients for a subblock within the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding; and controls a number of CABAC processes, wherein the encoding of the subblock flag is not counted as the number of CABAC processes.
Public/Granted literature
- US20220038703A1 ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD Public/Granted day:2022-02-03
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