Invention Grant
- Patent Title: Nanowire-based integrated via in anodic aluminum oxide layer for CMOS applications
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Application No.: US17339267Application Date: 2021-06-04
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Publication No.: US12142805B2Publication Date: 2024-11-12
- Inventor: Rhonda Franklin , Yali Zhang , Joseph Um , Bethanie Joyce Hills Stadler , Rashaunda Henderson
- Applicant: Regents of the University of Minnesota
- Applicant Address: US MN Minneapolis
- Assignee: Regents of the University of Minnesota
- Current Assignee: Regents of the University of Minnesota
- Current Assignee Address: US MN Minneapolis
- Agency: Fish & Richardson P.C.
- Main IPC: H01L23/66
- IPC: H01L23/66 ; H01P3/00 ; H01P11/00

Abstract:
A complementary metal-oxide-semiconductor (CMOS) device includes a metal oxide layer comprising anodic aluminum oxide (AAO) and one or more nanowires (NW) of an electrically conducting material each formed within a corresponding pore extending through the AAO from a first side of the layer to a second side of the layer opposite the first side, a first electrically conducting layer disposed on the first side of the metal oxide layer, and a second electrically conducting layer disposed on the second side of the metal oxide layer. The nanowires form a via electrically connecting first electrically conducting layer and the second electrically conducting layer.
Public/Granted literature
- US20220393328A1 NANOWIRE-BASED INTEGRATED VIA IN ANODIC ALUMINUM OXIDE LAYER FOR CMOS APPLICATIONS Public/Granted day:2022-12-08
Information query
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