Invention Grant
- Patent Title: Decoder and decoding method
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Application No.: US18368642Application Date: 2023-09-15
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Publication No.: US12149723B2Publication Date: 2024-11-19
- Inventor: Takahiro Nishi , Tadamasa Toma , Kiyofumi Abe , Yusuke Kato
- Applicant: Panasonic Intellectual Property Corporation of America
- Applicant Address: US CA Torrance
- Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee Address: US CA Torrance
- Main IPC: H04N19/44
- IPC: H04N19/44 ; H04N19/119 ; H04N19/176 ; H04N19/70

Abstract:
According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.
Public/Granted literature
- US20240007661A1 DECODER AND DECODING METHOD Public/Granted day:2024-01-04
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