Invention Grant
- Patent Title: System and method for NAND multi-plane and multi-die status signaling
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Application No.: US18097043Application Date: 2023-01-13
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Publication No.: US12169641B2Publication Date: 2024-12-17
- Inventor: Avadhani Shridhar , Neil Buxton
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A method for status signaling in a non-volatile memory including a plurality of logical units (LUNs), each of the plurality of LUNs having a status terminal coupled to a common status terminal of the non-volatile memory and a data bus coupled to a common data bus of the non-volatile memory. The method including performing, by a first LUN of the plurality of LUNs, a first set of one or more operations; completing, by the first LUN of the plurality of LUNs, the first set of one or more operations; and sending, by the first LUN via the common terminal, a pulse to a controller responsive to completing the first set of one or more operations.
Public/Granted literature
- US20230153024A1 SYSTEM AND METHOD FOR NAND MULTI-PLANE AND MULTI-DIE STATUS SIGNALING Public/Granted day:2023-05-18
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