A technique for convergence verification including receiving a data object representation of a first circuit block, receiving one or more assumptions associated with the first circuit block, identifying a synchronization scheme coupled to a port of the first circuit block, determining that the synchronization scheme is within a threshold flip-flop depth, identifying, based on the determination that the synchronization scheme is within the threshold flip-flop depth, a type of the synchronization scheme and a flip-flop depth between the synchronization scheme and the port, generating first convergence information for the first circuit block based on the identified type and flip-flop depth of the synchronization scheme, and outputting the generated convergence information.