An integrated circuit includes a first power rail on a back-side of a wafer and being configured to supply a first voltage, a header circuit coupled to the first power rail and being configured to supply the first voltage to the first power rail, a second and third power rail on the back-side of the wafer, a fourth power rail on a front-side of the wafer, and a fifth power rail on the back-side of the wafer. The second and third power rail being configured to supply a second voltage. The fourth power rail includes a first set of conductors configured to supply a third voltage to the header circuit. The fifth power rail is configured to supply the third voltage and is separated from the first power rail in a first and second direction, and is separated from the second and third power rail in the first direction.