发明申请
US20020053685A1 High side and low side guard rings for lowest parasitic performance in an H-bridge configuration
审中-公开
高侧和低侧保护环在H桥配置中具有最低的寄生性能
- 专利标题: High side and low side guard rings for lowest parasitic performance in an H-bridge configuration
- 专利标题(中): 高侧和低侧保护环在H桥配置中具有最低的寄生性能
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申请号: US10025894申请日: 2001-12-26
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公开(公告)号: US20020053685A1公开(公告)日: 2002-05-09
- 发明人: Sameer Pendharkar , Taylor R. Efland
- 主分类号: H01L027/10
- IPC分类号: H01L027/10 ; H01L027/01 ; H01L027/12
摘要:
A method of minimizing parasitics in an MOS device caused by the formation of a bipolar transistor within the MOS devices and the device, primarily for a polyphase bridge circuit. For the low side device, a substrate of a first conductivity type is provided having a first buried layer of opposite conductivity type thereon. A second buried layer of the first conductivity type is formed over the first buried layer and a further layer of the first conductivity type is formed over the second buried layer. A sinker extending through the further layer to the first buried layer is formed to isolate the second buried layer and the further layer from the substrate. Formation of an MOS device in the further layer including source, drain and gate regions is completed and the sinker is connected to a source terminal of the device. The second buried layer is formed either by coimplanting a p-type dopant and an n-type dopant with one of the dopant having a higher diffusion rate than the other or by implanting and diffusing one of the two dopants first to form one layer and then implanting and diffusing the other dopant to form the second layer. The preferred dopants are boron as the p-type dopant and antimony as the n-type dopant.
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