Invention Application
- Patent Title: Process for manufacturing components in a semiconductor material wafer with reduction in the starting wafer thickness
- Patent Title (中): 用于在半导体材料晶片中制造元件的方法,其中起始晶片厚度减小
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Application No.: US10037484Application Date: 2001-12-19
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Publication No.: US20020127761A1Publication Date: 2002-09-12
- Inventor: Marta Mottura , Alessandra Fischetti , Marco Ferrera , Bernardino Zerbini , Mauro Bombonati
- Applicant: STMicroelectronics S.r.I.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.I.
- Current Assignee: STMicroelectronics S.r.I.
- Current Assignee Address: IT Agrate Brianza
- Priority: EP00830835.5 20001220
- Main IPC: H01L021/00
- IPC: H01L021/00

Abstract:
A process for manufacturing components in a multi-layer wafer, including the steps of: providing a multi-layer wafer comprising a first semiconductor material layer, a second semiconductor material layer (, and a dielectric material layer arranged between the first and the second semiconductor material layer; and removing the first semiconductor material layer initially by mechanically thinning the first semiconductor material layer, so as to form a residual conductive layer, and subsequently by chemically removing the residual conductive layer. In one application, the multi-layer wafer is bonded to a first wafer of semiconductor material, with the second semiconductor material layer facing the first wafer, after micro-electromechanical structures have been formed in the second semiconductor material layer of the multi-layer wafer.
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