A ball grid array packaging structure for sealing a silicon chip on a substrate is disclosed. The substrate includes a front wiring layer and a back wiring layer. The front wiring layer includes a plurality of inner power rings and an outer power ring. The inner power rings are attached and together they surround a central region where the silicon chip is attached. The inner power rings and the outer power ring have a substantially identical width and the outer power ring surrounds all the inner power rings. The back wiring layer has a large number of interface power balls and core power balls. The interface power balls may be further subdivided into groups of inner power balls, while each group of inner power balls corresponds and couples with one of the inner power rings of the front wiring layer. The core power balls connect with the outer power ring and surround the interface power balls.