发明申请
- 专利标题: Distributed write data drivers for burst access memories
- 专利标题(中): 用于突发存取存储器的分布式写入数据驱动程序
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申请号: US10231682申请日: 2002-08-29
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公开(公告)号: US20020196668A1公开(公告)日: 2002-12-26
- 发明人: Todd A. Merritt , Troy A. Manning
- 申请人: Micron Technology, Inc.
- 申请人地址: null
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: null
- 主分类号: G11C005/00
- IPC分类号: G11C005/00
摘要:
An integrated circuit memory device is designed to perform high speed data write cycles. An address strobe signal is used to latch a first address. During a burst access cycle the address is incremented internal to the device with additional address strobe transitions. A new memory address is only required at the beginning of each burst access. Read/Write commands are issued once per burst access eliminating the need to toggle the Read/Write control line at the device cycle frequency. A transition of the Read/Write control line during a burst access is used to terminate the burst access and initialize the device for another burst access. Write cycle times are maximized to allow for increases in burst mode operating frequencies. Local logic gates near a nay sense amplifiers are used to control write is data drivers to provide for maximum write times without crossing current during input/output line equilibration periods. By gating global write enable signals with global equilibrate signals locally at data sense amp locations, local write cycle control signals are provided which are valid for essentially the entire cycle time minus an I/O line equilibration period in burst access memory devices. For nonburst mode memory devices such as EDO and Fast Page Mode, the write function may begin immediately following the end of the equilibration cycle to provide a maximum write time without interfering with the address setup time of the next access cycle.
公开/授权文献
- US06914830B2 Distributed write data drivers for burst access memories 公开/授权日:2005-07-05