发明申请
US20030186502A1 STRUCTURE AND METHODS FOR PROCESS INTEGRATION IN VERTICAL DRAM CELL FABRICATION 有权
用于垂直DRAM单元制造过程集成的结构和方法

STRUCTURE AND METHODS FOR PROCESS INTEGRATION IN VERTICAL DRAM CELL FABRICATION
摘要:
A method for processing a semiconductor memory device is disclosed, the memory device including an array area and a support area thereon. In an exemplary embodiment of the invention, the method includes removing, from the array area, an initial pad nitride material formed on the device. The initial pad nitride material in the support area, however, is still maintained. Active device areas are then formed within the array area, wherein the initial pad nitride maintained in the support area helps to protect the support area from wet etch processes implemented during the formation of active device areas within the array area.
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