Invention Application
- Patent Title: Method for producing multilayer wiring circuit board
- Patent Title (中): 多层布线电路板的制造方法
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Application No.: US10363167Application Date: 2003-03-05
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Publication No.: US20040011855A1Publication Date: 2004-01-22
- Inventor: Kei Nakamura , Satoshi Tanigawa , Shinya Oota
- Priority: JP2001-204885 20010705; JP2002-25864 20020201
- Main IPC: B23K001/00
- IPC: B23K001/00

Abstract:
A method of producing a multilayer wired circuit board that can provide sufficient adhesion strength of the interface between a conductor layer and a thermosetting adhesive layer laminated, to provide improvement in connection strength between the conductor layers and thus improvement in reliability. In this method, after a thermosetting adhesive layer is formed on a first conductor layer, an opening is formed in the thermosetting adhesive layer and solder powders are charged in the opening at normal temperature. Sequentially, a second conductor layer is formed on the thermosetting adhesive layer including the opening filled with the solder powders. Thereafter, the solder powders are melted by heating, to electrically connect between the first conductor layer and the second conductor layer.
Public/Granted literature
- US06851599B2 Method for producing multilayer wiring circuit board Public/Granted day:2005-02-08
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