发明申请
US20040067447A1 Method for making a multilevel circuitry comprising conductor tracks and microvias
审中-公开
制造包括导体轨迹和微孔的多电路电路的方法
- 专利标题: Method for making a multilevel circuitry comprising conductor tracks and microvias
- 专利标题(中): 制造包括导体轨迹和微孔的多电路电路的方法
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申请号: US10451913申请日: 2003-11-14
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公开(公告)号: US20040067447A1公开(公告)日: 2004-04-08
- 发明人: Robert Cassat , Vincent Lorentz
- 优先权: FR00/17249 20001229
- 主分类号: G03F007/16
- IPC分类号: G03F007/16 ; C25D005/02 ; H01L021/288 ; G03F007/20 ; H05K001/11 ; H01R012/04 ; G03F007/40 ; H01L021/445 ; H05K003/00
摘要:
The invention concerns a method for making an multilevel interconnection circuitry comprising conductor tracks and micro-vias. The method for producing at least one of the levels comprises the following steps: a) on a substrate including at its surface metallizable and/or potentially metallizable parts (102), forming a first insulating photosensitive resin layer (103) comprising a compound capable of inducing subsequent metallization; b) exposing and revealing the first layer (103) so as to selectively uncover the metallizable and/or potentially metallizable parts (102) of the substrate; c) forming, by metallization, metal conductor tracks (111) and micro-vias (110) at the surface of the first insulating photosensitive resin layer (113) and of the parts uncovered during step b), by providing a second photosensitive resin layer (105) forming a selective protection, the second photosensitive resin layer (105) being eliminated.
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