发明申请
- 专利标题: Lamination process and structure of high layout density substrate
- 专利标题(中): 层压工艺和结构高的布局密度基板
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申请号: US10717116申请日: 2003-11-19
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公开(公告)号: US20040105955A1公开(公告)日: 2004-06-03
- 发明人: Kwun Yao Ho , Moriss Kung
- 申请人: VIA TECHNOLOGIES, INC.
- 申请人地址: TW TAIPEI
- 专利权人: VIA TECHNOLOGIES, INC.
- 当前专利权人: VIA TECHNOLOGIES, INC.
- 当前专利权人地址: TW TAIPEI
- 优先权: TW091134865 20021129
- 主分类号: B32B003/06
- IPC分类号: B32B003/06
摘要:
A lamination process and structure of a high layout density substrate is disclosed. The lamination process comprises the following steps. First of all, a plurality of laminating layers are individually formed, wherein each laminating layer has a first dielectric layer, a plurality of first vias and a patterned conducting layer. Next, a bottom layer having a second dielectric layer and a plurality of second vias is formed. Then, the laminating layers and the bottom layer are stacked. Finally, the laminating layers and the bottom layer are laminated simultaneously to form a multiplayer substrate at one time.
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