Invention Application
- Patent Title: Array substrate of liquid crystal display device having thin film transistor on color filter structure and method of fabricating the same
- Patent Title (中): 在滤色器结构上具有薄膜晶体管的液晶显示装置的阵列基板及其制造方法
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Application No.: US10716562Application Date: 2003-11-20
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Publication No.: US20040109110A1Publication Date: 2004-06-10
- Inventor: Se-Jun Kim , Seung-Ryul Park
- Applicant: LG.Philips LCD Co., Ltd.
- Applicant Address: null
- Assignee: LG.Philips LCD Co., Ltd.
- Current Assignee: LG.Philips LCD Co., Ltd.
- Current Assignee Address: null
- Priority: KRP2002-0078106 20021210
- Main IPC: G02F001/1335
- IPC: G02F001/1335

Abstract:
An array substrate of a liquid crystal display device having a thin film transistor on a color filter structure and a method of fabricating the same are disclosed in the present invention. The liquid crystal display device having a thin film transistor on color filter structure array substrate includes a gate line and a gate electrode on a substrate, the gate line and the gate electrode being formed of a light-shielding material, a color filter layer on the substrate, covering edge portions of the gate line and the gate electrode, an overcoat layer over the substrate covering the color filter, the overcoat layer having openings exposing portions of the gate line and the gate electrode, a gate insulating layer on the overcoat layer, the color filter layer, the gate line, and the gate electrode, a semiconductor layer on the gate insulating layer, wherein the semiconductor layer has a width smaller than the gate electrode, source and drain electrodes on the gate insulating layer, contacting portions of the semiconductor layer, wherein the gate electrode, the semiconductor layer, the source electrode, and the drain electrode constitute a thin film transistor, a data line on the gate insulating layer, extending from the source electrode, crossing the gate line, and defining a pixel region, a passivation layer covering the thin film transistor and the data line and having a drain contact hole exposing a portion of the drain electrode, and a pixel electrode on the passivation layer, contacting the drain electrode through the drain contact hole.
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