发明申请
US20050023633A1 Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
有权
使用部分耗尽和完全耗尽的晶体管配置的绝缘体上半导体SRAM
- 专利标题： Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
- 专利标题（中）： 使用部分耗尽和完全耗尽的晶体管配置的绝缘体上半导体SRAM
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申请号： US10700869申请日： 2003-11-04
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公开(公告)号： US20050023633A1公开(公告)日： 2005-02-03
- 发明人: Yee-Chia Yeo , Fu-Liang Yang , Chenming Hu
- 申请人： Yee-Chia Yeo , Fu-Liang Yang , Chenming Hu
- 主分类号： H01L21/8244
- IPC分类号： H01L21/8244 ; H01L21/84 ; H01L27/11 ; H01L27/12 ; H01L29/00
摘要：
A static memory element includes a first inverter having an input coupled to a left bit node and an output coupled to a right bit node. A second inverter has an input coupled to the right bit node and an output coupled to the left right bit node. A first fully depleted semiconductor-on-insulator transistor has a drain coupled to the left bit node, and a second fully depleted semiconductor-on-insulator transistor has a drain coupled to the right bit node.
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