发明申请
- 专利标题: Instruction set for efficient bit stream and byte stream I/O
- 专利标题(中): 指令集用于高效的位流和字节流I / O
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申请号: US10686882申请日: 2003-10-15
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公开(公告)号: US20050027944A1公开(公告)日: 2005-02-03
- 发明人: Kenneth Williams , Scott Johnson , Bruce McNamara , Albert Wang
- 申请人: Kenneth Williams , Scott Johnson , Bruce McNamara , Albert Wang
- 主分类号: G06F7/38
- IPC分类号: G06F7/38 ; G06F9/00 ; G06F9/30 ; G06F9/302 ; G06F9/312 ; G06F9/318 ; G06F9/38 ; G06F9/45 ; G06F12/00 ; G06F15/00 ; G06F15/76
摘要:
A system and method provide unaligned load/store functionality for a processor that supports only aligned load/store instructions. An exemplary embodiment includes an extension adapter including registers for storing data and load/store buffers for realigning data. A processor executes aligned load/store instructions that transfer data in multiples of bytes. Instructions are included for transferring data between memory and the load/store buffers, initializing and transferring data, initializing and transferring data in numbers of bits, advancing or offsetting a data pointer, and for flushing the load/store buffers. In a preferred embodiment, the extension adapter comprises a wide register file for buffering full words of data, load/store buffers formed from multiple single-bit registers for buffering data bits and streaming data for use by the processor, and address generators for pointing to data or memory addresses.
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