A semiconductor module includes a supporting substrate having a connecting section on a first major surface thereof. A first semiconductor chip includes a first MIS transistor a source of which is formed on the bottom thereof. A second semiconductor chip includes a second MIS transistor a drain of which is formed on the bottom thereof. The first and second semiconductor chips are on the supporting substrate such that the source of the first MIS transistor and the drain of the second MIS transistor are connected to the connecting section and connected each other through the connecting section. An IC chip is provided on the first major surface and connected to gates of the first and second MIS transistors. An insulative envelope covers the supporting substrate, first and second semiconductor chips and IC chip. Partly exposed connecting terminals are electrically connected to the connecting section and first and second semiconductor chips.