发明申请
US20050048766A1 METHOD FOR FABRICATING A CONDUCTIVE PLUG IN INTEGRATED CIRCUIT 审中-公开
在集成电路中制作导电插片的方法

METHOD FOR FABRICATING A CONDUCTIVE PLUG IN INTEGRATED CIRCUIT
摘要:
A method for fabricating a conductive plug device is disclosed. A semiconductor substrate having a diffusion region thereon is provided. A dielectric layer is deposited over the semiconductor substrate. An opening is formed in the dielectric layer to expose a portion of the diffusion region. An un-doped CVD silicon layer is deposited on interior walls of the opening. A pure CVD phosphorus layer is in-situ deposited on the un-doped CVD silicon layer. The pure CVD phosphorus layer thereafter diffuses into the subjacent un-doped CVD silicon layer to form a doped silicon layer. Subsequently, a second un-doped CVD silicon layer is in-situ deposited on the doped silicon layer.
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