发明申请
US20050064687A1 SILICIDE PROXIMITY STRUCTURES FOR CMOS DEVICE PERFORMANCE IMPROVEMENTS
失效
用于CMOS器件性能改进的硅化物接近结构
- 专利标题: SILICIDE PROXIMITY STRUCTURES FOR CMOS DEVICE PERFORMANCE IMPROVEMENTS
- 专利标题(中): 用于CMOS器件性能改进的硅化物接近结构
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申请号: US10605310申请日: 2003-09-22
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公开(公告)号: US20050064687A1公开(公告)日: 2005-03-24
- 发明人: Dureseti Chidambarrao , Omer Dokumaci , Rajesh Rengarajan , An Steegen
- 申请人: Dureseti Chidambarrao , Omer Dokumaci , Rajesh Rengarajan , An Steegen
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/336 ; H01L21/38 ; H01L21/8238 ; H01L21/84 ; H01L27/12 ; H01L29/45 ; H01L29/786
摘要:
A method for manufacturing an integrated circuit having a plurality of semiconductor devices including an n-type field effect transistor and a p-type field effect transistor on a semiconductor wafer by creating a spacer having a first width for the n-type field effect transistor and creating a spacer having a second width for the p-type field effect transistor, the first width being greater than the second width and depositing silicide material on the semiconductor wafer such that tensile mechanical stresses are formed within a channel of the n-type field effect transistor and compressive stresses are formed within a channel of the p-type field effect transistor.
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