发明申请
US20050068213A1 Digital compensation of excess delay in continuous time sigma delta modulators
审中-公开
连续时间Σ-Δ调制器的多余延迟的数字补偿
- 专利标题: Digital compensation of excess delay in continuous time sigma delta modulators
- 专利标题(中): 连续时间Σ-Δ调制器的多余延迟的数字补偿
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申请号: US10903608申请日: 2004-07-29
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公开(公告)号: US20050068213A1公开(公告)日: 2005-03-31
- 发明人: Paul-Aymeric Fontaine , Ahmed Mohieldin
- 申请人: Paul-Aymeric Fontaine , Ahmed Mohieldin
- 主分类号: H03M3/04
- IPC分类号: H03M3/04 ; H03M3/00
摘要:
A continuous time sigma delta modulator having minimal excess loop delay. The continuous-time sigma delta modulator in accordance with the present invention includes at least one integrator stage coupled to receive an input signal and a resultant integrator output signal from a previous stage for providing a resultant integrator output. At least one output stage connects to the at least one integrator stage to receive the resultant integrator output signal from the previous integrator stage for providing a resultant integrator output. A sample and hold circuit connects to receive the second integrator input signal. A multiplier connects to the sample and hold circuit to provide a resultant sampled signal. An analog-to-digital converter quantizer couples to receive the resultant sampled signal and to produce a quantized output signal. A digital modulation loop circuit connects to the analog-to-digital converter quantizer to generate a resultant quantized output signal for correcting excess loop delay in the continuous time sigma delta modulator. A fourth feedback multiplier coupled to receive the resultant quantized output signal and produce a second resultant quantized output signal. A digital-to-analog converter coupled to receive the second resultant quantized output signal to produce a modulation feedback signal. A delay connects to the digital-to-analog converter to receive the modulation feedback signal and provide the resultant modulation feedback signal
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