A overheat protection circuit is formed on the same semiconductor substrate as a power MOS FET is formed on. As the configuration, a first resistor is connected between an input terminal and a gate of the power MOS FET, a second resistor, a temperature sensing element, and a third resistor are connected in this order between the input terminal and a ground point, an FET for clamp is connected in parallel to a series circuit of the temperature sensing element and the third resistor, a series circuit of an FET for current adjustment and a fourth resistor is connected in parallel to the MOS FET for clamp, a series circuit of a fifth and sixth resistors is connected between the input terminal and the ground point, a node of the fifth and sixth resistors is connected to a gate of the FET for current adjustment, an FET for switching is connected between the gate of the power MOS FET and the ground point, and a node of the temperature sensing element and the third resistor is connected to a gate of the FET for switching.