发明申请
- 专利标题: Method for improving the critical dimension uniformity of patterned features on wafers
- 专利标题(中): 改善晶片上图形特征的临界尺寸均匀性的方法
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申请号: US10678788申请日: 2003-10-03
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公开(公告)号: US20050076323A1公开(公告)日: 2005-04-07
- 发明人: Tsai-Sheng Gau , Jaw-Jung Shin , Jan-Wen You , Burn-Jeng Lin
- 申请人: Tsai-Sheng Gau , Jaw-Jung Shin , Jan-Wen You , Burn-Jeng Lin
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: G03F7/20
- IPC分类号: G03F7/20 ; G06T7/00 ; G06F17/50 ; G06K9/00
摘要:
A method for improving the critical dimension uniformity of a patterned feature on a wafer in semiconductor and mask fabrication is provided. In one embodiment, an evaluation means for evaluating the critical dimension distribution of a plurality of circuit layouts formed on the wafer, the plurality of circuit layouts defined by a mask is provided. A logic operation is performed on the plurality of circuit layouts to extract the patterned feature. The patterned feature is compared with design rules and if there is a deviation or difference between the patterned feature and the design rules, this difference is compensated for by adjusting photolithography adjustable parameters, such as, for example, mask-making.
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