A MIS type semiconductor device comprises a semiconductor layer provided with a recess portion having a side wall with an obtuse angle at least at a portion of the recess portion, a gate electrode formed over a bottom surface of the recess portion, with a gate insulating film interposed, a source region and a drain region formed on sides of the gate electrode with an insulating film interposed, such that boundary planes between the source region and the drain region, on one hand, and the insulating film, on the other hand, are formed in the semiconductor layer at an angle to a surface of the semiconductor layer, and wiring portions for contact with the surface of the semiconductor layer. Wherein an edge of the gate electrode is located inside the recess portion provided in the semiconductor layer, and there is provided at least one of a mutually opposed portion between the gate electrode and the source region and a mutually opposed portion between the gate electrode and the drain region, whereby at least one of a portion of the source region and a portion of the drain region, which lie in the associated mutually opposed portions, functions as an accumulation layer.