发明申请
- 专利标题: Circuit barrier structure of semiconductor packaging substrate and method for fabricating the same
- 专利标题(中): 半导体封装基板的电路阻挡结构及其制造方法
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申请号: US10876475申请日: 2004-06-28
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公开(公告)号: US20050082672A1公开(公告)日: 2005-04-21
- 发明人: Shih-Ping Hsu , Kun-Chen Tsai
- 申请人: Shih-Ping Hsu , Kun-Chen Tsai
- 专利权人: Phoenix Precision Technology Corporation
- 当前专利权人: Phoenix Precision Technology Corporation
- 优先权: TW092128801 20031017
- 主分类号: H01L21/48
- IPC分类号: H01L21/48 ; H01L23/498 ; H05K3/06 ; H05K3/10 ; H05K3/24 ; H05K3/28 ; H05K3/38 ; H01L23/48
摘要:
A circuit barrier structure of a semiconductor packaging substrate and a method for fabricating the same, forming a metal conductive layer on an insulating layer of the substrate and a patterned resist layer on the metal conductive layer. The patterned resist layer has a plurality of holes to expose predetermined parts of the metal conductive layer. A metal barrier layer is formed on the resist layer and in the holes. A patterned circuit layer is electroplated in the holes of the resist layer after removing the metal barrier layer on the resist layer. The resist layer and the metal conductive layer underneath the resist layer are removed. Another metal barrier layer can be formed on the circuit layer. The patterned circuit layer is covered by the metal barrier layers to prevent damage from etching to the circuit layer and inhibit migration of metal particles in the circuit layer.
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