发明申请
- 专利标题: Architecture for an iterative decoder
- 专利标题(中): 迭代解码器的架构
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申请号: US10926063申请日: 2004-08-26
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公开(公告)号: US20050102597A1公开(公告)日: 2005-05-12
- 发明人: Alfonso Martinez , Massimo Rovini
- 申请人: Alfonso Martinez , Massimo Rovini
- 优先权: FR0310261 20030828
- 主分类号: H03M13/29
- IPC分类号: H03M13/29 ; H03M13/37 ; H04L1/00 ; G06F11/00 ; H03M13/00
摘要:
Iterative decoder comprising a plurality of servers which perform the iterative decoding of a data block each, an input buffer memory and a control unit which performs a statistical multiplexing of the data at input, which are firstly stored in the input buffer memory and successively processed by one of the servers. The input buffer memory comprises N+L memory locations, where N is the number of servers and L is the number of so-called additional locations. Each block to be decoded which is received while all the servers are busy is stored in one of the L additional locations possibly available, or it is lost if the input buffer memory is entirely filled. The number L of additional locations and the number N of servers are such that the probability PB of a block being lost, calculated on the basis of a queuing model of D/G/N/N+L type, satisfies the condition PB≦α·FER*, where FER* is the error rate in the blocks allowed and α
公开/授权文献
- US07275203B2 Architecture for an iterative decoder 公开/授权日:2007-09-25
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