发明申请
- 专利标题: METHOD FOR IMPROVING TRANSISTOR PERFORMANCE THROUGH REDUCING THE SALICIDE INTERFACE RESISTANCE
- 专利标题(中): 通过减少绝缘体接触电阻来提高晶体管性能的方法
-
申请号: US10731269申请日: 2003-12-08
-
公开(公告)号: US20050130454A1公开(公告)日: 2005-06-16
- 发明人: Anand Murthy , Boyan Boyanov , Glenn Glass , Thomas Hoffmann
- 申请人: Anand Murthy , Boyan Boyanov , Glenn Glass , Thomas Hoffmann
- 主分类号: H01L21/285
- IPC分类号: H01L21/285 ; H01L21/336 ; H01L29/78 ; H01L21/28
摘要:
An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source and drain regions. The interface of the silicon germanium and the nickel silicon germanium silicide has a lower specific contact resistivity based on a decreased metal-semiconductor work function between the silicon germanium and the silicide and the increased carrier mobility in silicon germanium versus silicon. The silicon germanium may be doped to further tune its electrical properties. A reduction of the external resistance of a transistor equates to increased transistor performance both in switching speed and power consumption.
公开/授权文献
信息查询
IPC分类: