Invention Application
- Patent Title: Apparatus and method for calculating a result of a modular multiplication
- Patent Title (中): 用于计算模数乘法的结果的装置和方法
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Application No.: US10977561Application Date: 2004-10-28
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Publication No.: US20050149595A1Publication Date: 2005-07-07
- Inventor: Wieland Fischer , Holger Sedlak , Jean-Pierre Seifert
- Applicant: Wieland Fischer , Holger Sedlak , Jean-Pierre Seifert
- Applicant Address: US DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: US DE Munich
- Priority: DE10219158.1 20020429
- Main IPC: G06F7/53
- IPC: G06F7/53 ; G06F7/72 ; G06F15/00

Abstract:
Apparatus for calculating a result of a modular multiplication of a first operand and a second operand with regard to a modulus, each having a length of 2 n bits, the operands and the modulus are split into sub-operands of half the length and are fed to controller controlling MMD unit for performing a MultModDiv operation in accordance with a predetermined step sequence with corresponding input operands and MMD moduli to obtain integer quotient values and residual values with regard to the MMD modulus at an output. The combiner is operable to combine integer quotient values and residual values from predetermined steps of the step sequence to obtain the result.
Public/Granted literature
- US07558817B2 Apparatus and method for calculating a result of a modular multiplication Public/Granted day:2009-07-07
Information query
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