- 专利标题: Semiconductor device and method of manufacturing the same
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申请号: US11022773申请日: 2004-12-28
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公开(公告)号: US20050151168A1公开(公告)日: 2005-07-14
- 发明人: Yoshitaka Sasago , Takashi Kobayashi
- 申请人: Yoshitaka Sasago , Takashi Kobayashi
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 优先权: JPP2002-182027 20020621
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234 ; G11C16/04 ; H01L21/8247 ; H01L27/088 ; H01L27/10 ; H01L27/115 ; H01L29/788 ; H01L29/792 ; H01L29/73 ; H01L21/82
摘要:
Reliability of a semiconductor device having a nonvolatile memory comprising first through third gate electrodes is enhanced. With a flash memory having first gate electrodes (floating gate electrodes), second gate electrodes (control gate electrodes) and third gate electrodes, isolation parts are formed in a self-aligned manner against patterns of a conductor film for forming the third gate electrodes by filling up the respective isolation grooves and a gate insulator film for select nMISes in a peripheral circuit region is formed prior to the formation of the isolation parts. By so doing, deficiency with the gate insulator film for the select nMISes, caused by stress occurring to the isolation parts, can be reduced. Further, with the semiconductor device including the case of stacked memory cells, the patterns of the conductor film for forming the third gate electrodes, serving as a mask for forming the isolation parts in the self-aligned manner, can be formed without misalignment against channels.
公开/授权文献
- US07190017B2 Semiconductor device and method of manufacturing the same 公开/授权日:2007-03-13
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