A phase change memory device includes a plurality of phase-change memory cells, arranged in rows and columns, phase-change memory cells arranged on the same column being connected to a same bit line; a plurality of first selectors, each coupled to a respective phase-change memory cell; an addressing circuit for selectively addressing at least one of the bit lines, one of the first selectors, and the phase-change memory cell connected to the addressed bit line and to the addressed first selector; and a regulated voltage supply circuit, selectively connectable to the addressed bit line, for supplying a bit line voltage. The bit line voltage is correlated to a first control voltage on the addressed first selector, coupled to the addressed phase-change memory cell.