利索-全球专利检索

  1. 登录
  2. 注册
发明申请
US20050212581A1 Radio frequency CMOS buffer circuit and method 失效
射频CMOS缓冲电路及方法

Radio frequency CMOS buffer circuit and method
摘要：
A buffer (40) includes a capacitor (42) having a first terminal for receiving an input signal, and a second terminal; a first transistor (44) having a first current electrode for receiving a first power supply voltage, a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for providing an output signal of the buffer (40); and a second transistor (45) having a first current electrode coupled to the second current electrode of the first transistor (44), a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for receiving a second power supply voltage. A capacitance of the capacitor (42) is chosen to reduce a peak-to-peak voltage swing of the input signal such that a peak-to-peak voltage swing at the control electrodes of the first (44) and second (45) transistors is less than or equal to a difference between the first and second power supply voltages.
摘要（中）：

缓冲器（40）包括具有用于接收输入信号的第一端子的电容器（42）和第二端子; 第一晶体管（44），具有用于接收第一电源电压的第一电流电极，耦合到电容器（42）的第二端子的控制电极和用于提供缓冲器（40）的输出信号的第二电流电极， ; 以及第二晶体管（45），其具有耦合到所述第一晶体管（44）的所述第二电流电极的第一电流电极，耦合到所述电容器（42）的所述第二端子的控制电极和用于接收第二晶体管 电源电压。 选择电容器（42）的电容以减小输入信号的峰 - 峰电压摆幅，使得在第一（44）和第（45）晶体管的控制电极处的峰 - 峰电压摆幅 小于或等于第一和第二电源电压之间的差。

公开/授权文献
信息查询
Global Dossier Espacenet
0/0