发明申请
US20050212606A1 Wireless communications device having type-II all-digital phase-locked loop (PLL)
有权
具有II型全数字锁相环(PLL)的无线通信设备
- 专利标题: Wireless communications device having type-II all-digital phase-locked loop (PLL)
- 专利标题(中): 具有II型全数字锁相环(PLL)的无线通信设备
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申请号: US11122670申请日: 2005-05-04
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公开(公告)号: US20050212606A1公开(公告)日: 2005-09-29
- 发明人: Robert Staszewski , Dirk Leipold , Khurram Muhammad
- 申请人: Robert Staszewski , Dirk Leipold , Khurram Muhammad
- 主分类号: H03F1/02
- IPC分类号: H03F1/02 ; H03F1/32 ; H03L7/093 ; H03L7/099 ; H03L7/107 ; H03L7/00
摘要:
System and method for providing type-II (and higher order) phase-locked loops (PLLs) with a fast signal acquisition mode. A preferred embodiment comprises a wireless communication device having a loop filter with a proportional loop gain path (proportional loop gain circuit 1115) and an integral loop gain block (integral loop gain block 1120). The proportional loop gain path is used during signal acquisition to provide large loop bandwidth, hence fast signal acquisition of a desired signal. Then, during the PLL's signal tracking phase, the integral loop gain block is enabled and its output is combined with output from the proportional loop gain path to provide higher order filtering of the desired signal. An offset that may be present due to the use of the proportional loop gain path can be measured and subtracted to help improve signal tracking settling times.
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