发明申请
US20050225917A1 Integrated semiconductor circuit and method for testing the same 有权
集成半导体电路及其测试方法

Integrated semiconductor circuit and method for testing the same
摘要:
Integrated semiconductor circuits, in particular, dynamic random access memories include a multiplicity of generator circuits for generating internal voltage levels from an externally applied supply voltage. During testing, the internal voltage levels are altered by the output voltage generated at the output of the generator circuit being adapted to an externally applied test voltage. If the test voltage is outside a tolerance range, the semiconductor circuit maybe destroyed. A protection circuit connected in parallel with the generator circuit limits the output voltage.
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